DxO is leading the way to the future with its range of solutions enabling computational photography. By leveraging the potential of greater memory capacities and processing power, DxO's computation photography solutions allow for device manufacturers to offer innovative new features that improve upon existing applications as well as creating whole new uses for digital imaging.
Dedicated image processing architecture is needed to meet market demands
End-user demand is to get DSLR quality and lots of new imaging features, such as gesture control for instance, out of a smaller size phone. The camera ISP is increasingly implemented on the baseband or application processor in the phone, in order to benefit from the state of the art (28nm or below) manufacturing process used in these chips, which reduces silicon cost compared to discrete chip or less-dense sensor manufacturing.
However, new sensor technologies which are updated every year require changes in the ISP to keep the required image quality (by adapting to new pixel characteristics). Also new computational photography features, as for instance those based on sensor array-based cameras or light field cameras, are needed at an increasing pace to meet user demand and to differentiate among products on the competitive smartphone market.
The time between the specification freeze of the baseband and application processor and its availability in a phone can be several years. The ability to change features without silicon respin is therefore mandatory. A fully hardwired ISP does not meet the end-user requirements under these circumstances.
The computing power needed to process HD or 4K videos in real time at 30fps or 60fps is one to two orders of magnitude higher than what the main ARM processor, a DSP, or a GPU can deliver. A dedicated low-power scalable image processing architecture compatible with HD video recording is therefore required.
DxO IPC provides the post-silicon flexibility for your breakthrough imaging features
DxO Imaging Programmable Core (DxO IPC) is based on DxO Labs’ programmable SIMD core dedicated to image processing. It allows quick and easy enriching of your image and video processing chain with advanced imaging technologies for a low silicon and power consumption cost.
Since these features need to either run at video frame rate, or process several million pixels, the processing requirements are too high for a standard DSP. Dedicated to imaging, DxO IPC makes it much more silicon- and power-efficient for this class of algorithms. DxO IPC allows fast implementation of high-quality video and still-image features with significant processing requirements. It is a silicon-proven architecture shipping in high-volume consumer applications today.
Features are available from DxO Labs, from partners, or they can be your own implementation.
A full-feature programming tool
For extending your imaging chain without risk, DxO delivers along with the DxO IPC architecture a full-feature programming tool. It includes DxO IRIS high-level language dedicated to imaging (code size 95% smaller than C) and associated compiler for automatic generation of both a bit-exact C-model and the embedded microcode.
A complete SDK that runs on any ARM processor, with support for multiple use cases and configurations is delivered for quick development or integration of sophisticated new features without any silicon change.
DxO IPC’s flexible and programmable architecture safeguards your silicon investment and allows you to implement advanced features in a very short time.